Senior Logic Design Engineer
UniFabriX · Posted 2026-10-20
In this role you will be joining the UnifabriX VLSI team and be part of a group driving the next rack-level architectures, which will increase application performance and reduce overall costs.
Requirements
Bachelor’s degree in Electrical Engineering, Software Engineering or Computer Science.
8+ years of experience as hands-on with ASIC development.
Proven track record in RTL coding (Verilog).
Team player.
Ability to quickly learn new skills, enter new technical fields, drive, and lead an IP/Module from scratch.
Design, synthesis, place and route, timing constraints and closure
Experienced with Digital design CPU Subsystems, PCIe, DDR, HBM, NVMe, Ethernet
Knowledge of programming/scripting languages (Python)
Advantage: Experience with FPGA development, Altera or Xilinx build flow,
hands on with lab FPGA debug methodologies, such as ChipScope, SignalTap